The present invention relates generally to a logic module or macrocell for use in programmable logic devices (PLDs). More particularly, this invention relates to a look-up table based macrocell capable of functioning as a standard memory unit.
The fundamental building block of a PLD is a macrocell. Each macrocell is capable of performing basic "sum of products" logic on a number of input variables. When combined together in large numbers inside a PLD, they facilitate implementation of complex combinatorial as well as sequential logic.
One approach to implementing a macrocell utilizes a programmable memory structure that includes architecture bits for storing information corresponding to a desired logic configuration. The memory structure is then connected to a look-up table that, based on a logical combination of its several inputs, produces a selected bit from the memory structure at an output. To be able to perform sequential logic, the output of the look-up table also feeds an input of a configurable register. A macrocell thus constructed offers advantages in speed, density, programming flexibility, and manufacturing ease.
The programming element in such a macrocell can be implemented in a variety of technologies: fusible links, mask or electrically programmable read-only memory cells, or static random access memory (SRAM) cells. The complexity of the required programming circuitry varies with the type of memory technology used. For example, in the case of a PLD that uses SRAM technology as the logic configuration host, at a minimum, address decoding logic is required to load the programming data into the memory cells. This overhead programming circuitry adds to the size and cost of the integrated circuit.
Moreover, PLD's using look-up table based macrocells are designed such that the SRAM configuration bits are used to perform macrocell logic and control functions only. Therefore, for those applications where it is desirable to add standard memory functions to a PLD, independent memory cells in a separate memory structure are added to the PLD architecture. The added memory circuitry further increases the size and complexity, and therefore the cost of the integrated circuit.
From the foregoing, it can be appreciated that there is a need for a look-up table based macrocell with reduced programming overhead circuitry that also provides for standard memory functions without increasing circuit complexity and size.